// NATURE NEWS — SPAZIO & SCIENZA
An entangling gate for dual-rail erasure qubits
Nature
volume 656, pages 47–53 (2026) Cite this article
Quantum error correction (QEC) will likely be required to realize the full potential of quantum computing, but comes with daunting hardware overheads and demands low gate errors on the physical qubits1,2,3,4. These requirements can be eased by engineering qubits with a strong error hierarchy, in which the most common noise channels are also the easiest to correct. Erasure qubits can achieve this when detectable leakage errors out of the computational subspace dominate over the residual Pauli errors5,6,7,8,9,10,11, resulting in higher thresholds and improved scaling with code distance5,12,13. In practice, these advantages come to fruition only if the error hierarchy is preserved as much as possible throughout all gates and operations. Here we design and realize a two-qubit entangling gate for dual-rail cavity qubits, a type of erasure qubit encoded in a pair of superconducting microwave cavities7. Our experimental demonstration confirms that the error hierarchy is largely preserved during the gate. The gate is fast (about 500 ns duration) and shows low erasure rates of approximately 0.5% per gate, remaining Pauli errors below 0.1%, and a strong bias towards dephasing errors, in which bit-flips are practically non-existent at the 10−6 level. These results enable a faster path to error-corrected systems that rapidly suppress errors as they scale; a claim we support with our detailed surface code simulations.
To progress from the present-day era of NISQ machines14 to the era of effective quantum error correction (QEC), the performance of physical qubits and their fundamental operations must improve markedly. A useful approach to relax the requirements for QEC is to engineer qubits with structured noise, in which certain types of errors occur much more frequently than others, and to adapt the QEC scheme accordingly to take advantage of this noise. This strategy works best when the error structure is preserved as much as possible throughout all gates and measurements.
Stabilized cat qubits are an example of this model15,16,17,18,19,20, in which bit flips can be greatly suppressed relative to phase flips then allows us to concatenate these physical qubits with a repetition18 or thin rectangular surface code8,21,22,23,24 for a substantially improved QEC encoding rate.
A second way to realize this model is with erasure qubits, in which most of the errors can be detected as they occur at the hardware level10. After resetting these faulty qubits, the resulting error channel resembles a Pauli error at known spacetime location—an erasure error. QEC codes are generally more tolerant to erasures and can generally correct for twice as many erasures as Pauli errors at a given code distance5. They also possess higher thresholds as demonstrated by the surface code, which has a threshold close to 25% for phenomenological erasure noise12,13.
Erasure qubits are most often realized by detecting loss events that take us out of the computational subspace. For dual-rail qubits, such as those in photonic25,26,27,28 or superconducting platforms, this is loss of a photon or excitation that takes us to the vacuum state. In other platforms, such as neutral atoms or trapped ions, leakage to non-computational states or loss of the atom from the trap can also be detected and converted to an erasure10,29,30, with similar benefits9,31.
In superconducting circuit platforms, dual-rail qubits can be realized with pairs of transmons6,32,33,34 or microwave cavities7,35,36. When idling, dual-rail cavity qubits exhibit a strong hierarchy of errors that make them a promising erasure qubit. In this hierarchy, erasures dominate by a factor of 5–10 compared with phase flips, whereas the remaining bit flips are exceedingly rare. So far, superconducting dual-rail cavity qubits have demonstrated fast, high-fidelity single-qubit gates37,38, good state preparation and measurement (SPAM)36,